View LTC2902-1IGN_4893904.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ltc2902 2902f features descriptio u applicatio s u typical applicatio u programmable quad supply monitor with adjustable reset timer and supply tolerance n simultaneously monitors four supplies n 16 user selectable combinations of 5v, 3.3v, 3v, 2.5v, 1.8v, 1.5v and/or adjustable voltage thresholds n guaranteed threshold accuracy: 1.5% of monitored voltage over temperature n selectable supply tolerance: 5%, 7.5%, 10%, 12.5% below monitored voltage n low supply current: 43 m a typ n adjustable reset time n reset disable pin for margining applications n open-drain rst output (ltc2902-1) n push-pull rst output (ltc2902-2) n individual nondelayed monitor outputs for each supply n power supply glitch immunity n guaranteed reset for v cc 3 1v the ltc ? 2902 is a programmable supply monitor for sys- tems with up to four supply voltages. one of 16 preset or adjustable voltage monitor combinations can be selected using an external resistor divider connected to the pro- gram pin. the preset voltage thresholds are digitally pro- grammable to 5%, 7.5%, 10% or 12.5% below the nomi- nal operating voltage, and are accurate to 1.5% over tem- perature. all four voltage comparator outputs are con- nected to separate pins for individual supply monitoring. the reset delay time is adjustable using an external capacitor. tight voltage threshold accuracy and glitch immunity ensure reliable reset operation without false triggering. the rst output is guaranteed to be in the correct state for v cc down to 1v and may be disabled during supply margin testing. the ltc2902-1 features an open-drain rst output, while the ltc2902-2 has a push-pull rst output. the 43 m a supply current makes the ltc2902 ideal for power conscious systems and the part may be configured to monitor less than four inputs. the ltc2902-1/ltc2902-2 are available in the 16-lead narrow ssop package. quad supply monitor with adjustable tolerance (5v, 3.3v, 2.5v, 1.8v) n desktop and notebook computers n multivoltage systems n telecom equipment n portable battery-powered equipment n network servers , ltc and lt are registered trademarks of linear technology corporation. v1 v2 v ref v pg comp1 comp2 comp3 comp4 rst rdis t0 t1 gnd 10 11 r1 59k 1% r3 10k power good r2 40.2k 1% 12 7 9 8 6 15 1 16 2 13 3 14 4 5 c rt 47nf c2 0.1 f c1 0.1 f v4 v3 ltc2902-2 crt t rst = 216ms margin tolerance = 5% 2902 ta01 dc/dc converter 1.8v 2.5v 3.3v 5v system logic
2 ltc2902 2902f order part number gn16 part marking 29021 29022 29021i 29022i t jmax = 125 c, q ja = 130 c/w (notes 1, 2, 3) v1, v2, v3, v4, v pg ..................................... C 0.3v to 7v rst (ltc2902-1)........................................ C 0.3v to 7v rst (ltc2902-2).......................... C 0.3v to (v2 + 0.3v) compx, rdis ............................................. C 0.3v to 7v t0, t1 .......................................... C 0.3v to (v cc + 0.3v) crt ............................................. C 0.3v to (v cc + 0.3v) v ref ............................................. C 0.3v to (v cc + 0.3v) reference load current (i vref ) ............................ 1ma v4 input current (C adj mode) ............................ C1ma operating temperature range ltc2902-1c/ltc2902-2c ....................... 0 c to 70 c ltc2902-1i/ltc2902-2i .................... C40 c to 85 c storage temperature range .................. C 65 c to 150 c lead temperature (soldering, 10 sec)................... 300 c ltc2902-1cgn ltc2902-2cgn LTC2902-1IGN ltc2902-2ign absolute axi u rati gs w ww u package/order i for atio uu w consult ltc marketing for parts specified with wider operating temperature ranges. gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 comp3 comp1 v3 v1 crt rst t0 rdis comp2 comp4 v2 v4 v ref v pg gnd t1 symbol parameter conditions min typ max units v rt50 5v, 5% reset threshold v1 input threshold l 4.600 4.675 4.750 v 5v, 7.5% reset threshold l 4.475 4.550 4.625 v 5v, 10% reset threshold l 4.350 4.425 4.500 v 5v, 12.5% reset threshold l 4.225 4.300 4.375 v v rt33 3.3v, 5% reset threshold v1, v2 input threshold l 3.036 3.086 3.135 v 3.3v, 7.5% reset threshold l 2.954 3.003 3.053 v 3.3v, 10% reset threshold l 2.871 2.921 2.970 v 3.3v, 12.5% reset threshold l 2.789 2.838 2.888 v v rt30 3v, 5% reset threshold v2 input threshold l 2.760 2.805 2.850 v 3v, 7.5% reset threshold l 2.685 2.730 2.775 v 3v, 10% reset threshold l 2.610 2.655 2.700 v 3v, 12.5% reset threshold l 2.535 2.580 2.625 v v rt25 2.5v, 5% reset threshold v2, v3 input threshold l 2.300 2.338 2.375 v 2.5v, 7.5% reset threshold l 2.238 2.275 2.313 v 2.5v, 10% reset threshold l 2.175 2.213 2.250 v 2.5v, 12.5% reset threshold l 2.113 2.150 2.188 v v rt18 1.8v, 5% reset threshold v3, v4 input threshold l 1.656 1.683 1.710 v 1.8v, 7.5% reset threshold l 1.611 1.638 1.665 v 1.8v, 10% reset threshold l 1.566 1.593 1.620 v 1.8v, 12.5% reset threshold l 1.521 1.548 1.575 v v rt15 1.5v, 5% reset threshold v3, v4 input threshold l 1.380 1.403 1.425 v 1.5v, 7.5% reset threshold l 1.343 1.365 1.388 v 1.5v, 10% reset threshold l 1.305 1.328 1.350 v 1.5v, 12.5% reset threshold l 1.268 1.290 1.313 v v rta adj, 5% reset threshold v3, v4 input threshold l 0.492 0.500 0.508 v adj, 7.5% reset threshold l 0.479 0.487 0.494 v adj, 10% reset threshold l 0.466 0.473 0.481 v adj, 12.5% reset threshold l 0.453 0.460 0.467 v the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v, unless otherwise noted. (note 3) electrical characteristics
3 ltc2902 2902f the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v, unless otherwise noted. (note 3) electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: all voltage values are with respect to gnd. note 3: the greater of v1, v2 is the internal supply voltage (v cc ). note 4: under static no-fault conditions, v1 will necessarily supply quiescent current. if at any time v2 is larger than v1, v2 must be capable of supplying the quiescent current, programming (transient) current and reference load current. note 5: the output pins rst and compx have internal pull-ups to v2 of typically 6 m a. however, external pull-up resistors may be used when faster rise times are required or for v oh voltages greater than v2. note 6: the push-pull rst output pin on the ltc2902-2 is actively pulled up to v2. symbol parameter conditions min typ max units v rtan C adj reset threshold v4 input threshold l C18 0 18 mv v cc minimum internal operating voltage rst, compx in correct logic state; l 1v v cc rising prior to program v ccminp minimum required for programming v cc rising l 2.42 v v ccminc minimum required for comparators v cc falling l 2.32 v v ref reference voltage v cc 3 2.3v, i vref = 1ma, c ref 1000pf t0 low, t1 low l 1.192 1.210 1.228 v t0 low, t1 high l 1.160 1.178 1.195 v t0 high, t1 low l 1.128 1.146 1.163 v t0 high, t1 high l 1.096 1.113 1.130 v v pg programming voltage range v cc 3 v ccminp l 0v ref v i vpg v pg input current v pg = v ref l 20 na i v1 v1 input current v1 = 5v, i vref = 12 m a, (note 4) l 43 75 m a i v2 v2 input current v2 = 3.3v l 0.8 2 m a i v3 v3 input current v3 = 2.5v l 0.52 1.2 m a v3 = 0.55v (adj mode) C15 15 na i v4 v4 input current v4 = 1.8v l 0.34 0.8 m a v4 = 0.55v (adj mode) l C15 15 na v4 = C0.05v (Cadj mode) l C15 15 na i crt(up) crt pull-up current v crt = 0v l C1.4 C2 C2.6 m a i crt(dn) crt pull-down current v crt = 1.3v l 10 20 30 m a t rst reset time-out period c rt = 1500pf l 579 ms t uv v x undervoltage detect to rst or compx v x less than reset threshold v rtx 150 m s by more than 1% v ol output voltage low rst, compx i sink = 2.5ma; v1 = 3v, v2 = 3v; l 0.15 0.4 v v3, v4 = 0v; v pg = 0v i sink = 100 m a; v2 = 1v; v1, v3, v4 = 0v l 0.05 0.3 v i sink = 100 m a; v1 = 1v; v2, v3, v4 = 0v l 0.05 0.3 v v oh output voltage high rst, compx (note 5) i source = 1 m a l v2 C 1 v v oh output voltage high rst (ltc2902-2) i source = 200 m a l 0.8 ? v2 v (note 6) digital inputs t0, t1, rdis v il t0, t1 low level input voltage v cc = 3.3v to 5.5v l 0.3v cc v v ih t0, t1 high level input voltage v cc = 3.3v to 5.5v l 0.7v cc v i intol t0, t1 input current t0 = 0v, t1 = v cc l 0.1 1 m a v il rdis input threshold low v cc = 3.3v to 5.5v l 0.4 v v ih rdis input threshold high v cc = 3.3v to 5.5v l 1.6 v i rdis rdis pull-up current v rdis = 0v C10 m a
4 ltc2902 2902f test circuits ti i g diagra u ww typical perfor a ce characteristics uw v1 v2 v3 v4 2902 f01 ltc2902-1 rst or compx i source 1 a v1 v2 v3 v4 2902 f02 ltc2902-1 i sink 2.5ma, 100 a rst or compx v1 v2 v3 v4 2902 f03 ltc2902-2 rst i source 200 a figure 1. rst, compx v oh test figure 2. rst, compx v ol test figure 3. active pull-up rst v oh test t rst 2902 td v rtx v x rst compx t uv 1.5v v x monitor timing 5v threshold voltage vs temperature temperature ( c) ?0 threshold voltage, v rt50 (v) 4.75 4.70 4.65 4.60 4.55 4.50 4.45 4.40 4.35 4.30 4.25 ?0 20 40 2902 g01 ?0 0 60 80 100 5% 7.5% 10% 12.5% temperature ( c) ?0 threshold voltage, v rt33 (v) 3.135 3.100 3.065 3.030 2.995 2.960 2.925 2.890 2.855 2.820 2.785 ?0 20 40 2902 g02 ?0 0 60 80 100 5% 7.5% 10% 12.5% temperature ( c) ?0 threshold voltage, v rt30 (v) 2.850 2.815 2.780 2.745 2.710 2.675 2.640 2.605 2.570 2.535 ?0 20 40 2902 g03 ?0 0 60 80 100 5% 7.5% 10% 12.5% 3.3v threshold voltage vs temperature 3v threshold voltage vs temperature
5 ltc2902 2902f 2.5v threshold voltage vs temperature 1.8v threshold voltage vs temperature 1.5v threshold voltage vs temperature adj threshold voltage vs temperature C adj threshold voltage vs temperature i v1 vs temperature typical perfor a ce characteristics uw temperature ( c) ?0 threshold voltage, v rt25 (v) 2.375 2.350 2.325 2.300 2.275 2.250 2.225 2.200 2.175 2.150 2.125 2.100 ?0 20 40 2902 g04 ?0 0 60 80 100 5% 7.5% 10% 12.5% temperature ( c) ?0 threshold voltage, v rt18 (v) 1.710 1.685 1.660 1.635 1.610 1.585 1.560 1.535 1.510 ?0 20 40 2902 g05 ?0 0 60 80 100 5% 7.5% 10% 12.5% temperature ( c) ?0 threshold voltage, v rt15 (v) 1.425 1.405 1.385 1.365 1.345 1.325 1.305 1.285 1.265 ?0 20 40 2902 g06 ?0 0 60 80 100 5% 7.5% 10% 12.5% temperature ( c) ?0 threshold voltage, v rta (v) 0.508 0.503 0.498 0.493 0.488 0.483 0.478 0.473 0.468 0.463 0.458 0.453 ?0 20 40 2902 g07 ?0 0 60 80 100 5% 7.5% 10% 12.5% v ref vs temperature i v2 vs temperature i v3 vs temperature temperature ( c) ?0 threshold voltage, v rtan (v) 0.018 0.012 0.006 0 0.006 0.012 0.018 ?0 20 40 2902 g08 ?0 0 60 80 100 temperature ( c) ?0 v ref (v) 1.228 1.216 1.204 1.192 1.180 1.168 1.156 1.144 1.132 1.112 1.108 1.096 ?0 20 40 2902 g09 ?0 0 60 80 100 5% 7.5% 10% 12.5% temperature ( c) ?0 0 i v1 ( a) 10 30 40 50 100 70 ?0 20 40 2902 g10 20 80 90 60 ?0 0 60 80 100 v1 = 5v v2 = 3.3v v3 = 2.5v v4 = 1.8v temperature ( c) ?0 0.5 i v2 ( a) 0.6 0.8 0.9 1.0 1.5 1.2 ?0 20 40 2902 g11 0.7 1.3 1.4 1.1 ?0 0 60 80 100 v1 = 5v v2 = 3.3v v3 = 2.5v v4 = 1.8v temperature ( c) ?0 0.1 i v3 ( a) 0.2 0.4 0.5 0.6 1.1 0.8 ?0 20 40 2902 g12 0.3 0.9 1.0 0.7 ?0 0 60 80 100 v1 = 5v v2 = 3.3v v3 = 2.5v v4 = 1.8v
6 ltc2902 2902f typical perfor a ce characteristics uw typical transient duration vs comparator overdrive (v1, v2) rst output voltage vs v1, v pg = 0v reset time-out period vs temperature reset time-out period vs capacitance i v4 vs temperature rst, compx i sink vs supply voltage temperature ( c) ?0 0 i v4 ( a) 0.1 0.3 0.4 0.5 1.0 0.7 ?0 20 40 2902 g13 0.2 0.8 0.9 0.6 ?0 0 60 80 100 v1 = 5v v2 = 3.3v v3 = 2.5v v4 = 1.8v reset comparator overdrive voltage (% of v rtx ) 0.1 250 typical transient duration ( s) 300 350 400 450 1 10 100 2902 g14 200 150 50 0 100 reset occurs above curve t a = 25 c v1 (v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 rst output voltage (v) 2902 g15 5 4 3 2 1 0 v1 = v2 = v3 = v4 10k pull-up from rst to v1 t a = 25 c temperature ( c) ?0 4.9 reset time-out period, t rst (ms) 5.9 6.4 6.9 8.9 7.9 ?0 20 40 2902 g16 5.4 8.4 7.4 ?0 0 60 80 100 c rt = 1500pf (silver mica) c rt (farad) 10p 100p 10n 1 10 1 100m 10m 1m 100 2902 g17 1n 100n reset time-out period, t rst (sec) t a = 25 c v1 or v2 (v) 0 0 i sink (ma) 2 4 6 1 2 34 2902 g18 5 8 10 1 3 5 7 9 6 v ol = 0.4v t a = 25 c v ol = 0.2v rst, compx voltage output low vs output sink current rst high level output voltage vs output source current (ltc2902-2) i sink (ma) 0 v ol (v) 20 40 50 90 2902 g19 10 30 60 70 80 3.0 2.5 2.0 1.5 1.0 0.5 0 85 c 25 c ?0 c v2 = 3v v1 = 5v i source (ma) 0 0.5 2 v oh (v) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2902 g20 2.5 1.5 1 85 c 25 c ?0 c v1 = 5v v2 = 3v v3 = 2.5v v4 = 1v reset comparator overdrive voltage (% of v rtx ) 0.1 80 typical transient duration ( s) 100 120 140 160 1 10 100 2902 g25 60 40 20 0 200 180 220 t a = 25 c reset occurs above curve typical transient duration vs comparator overdrive (v3, v4)
7 ltc2902 2902f uu u pi fu ctio s comp3 (pin 1): comparator output 3. nondelayed, active high logic output with weak pull-up to v2. pulls high when v3 is above reset threshold. may be pulled greater than v2 using external pull-up. comp1 (pin 2): comparator output 1. nondelayed, active high logic output with weak pull-up to v2. pulls high when v1 is above reset threshold. may be pulled greater than v2 using external pull-up. v3 (pin 3): voltage input 3. select from 2.5v, 1.8v, 1.5v or adj. see table 1 for details. v1 (pin 4): voltage input 1. select from 5v or 3.3v. see table 1 for details. the greater of (v1, v2) is also v cc for the chip. bypass this pin to ground with a 0.1 m f (or greater) capacitor. crt (pin 5): reset delay time programming pin. attach an external capacitor (c rt ) to gnd to set a reset delay time of 4.6ms/nf. leaving the pin open generates a minimum delay of approximately 50 m s. a 47nf capacitor will gener- ate a 216ms reset delay time. typical perfor a ce characteristics uw rst pull-up current vs v2 (ltc2902-1) rst pull-up current vs v2 (ltc2902-2) input overdrive above threshold (mv) compx propagation delay ( s) 250 200 v1, v2 v3, v4 150 2902 g22 0 100 50 1000 10 100 t a = 25 c v2 (v) 2 0 pull-up current ( a) 4 8 12 2.5 3 3.5 4 2902 g23 4.5 16 20 2 6 10 14 18 5 t a = 25 c v rt25 v rt30 v rt33 v2 (v) 2 0 pull-up current (ma) 2 4 5 2.5 3 3.5 4 2902 g24 4.5 1 3 6 5 t a = 25 c v rt25 v rt30 v rt33 compx propagation delay vs input overdrive above threshold compx pull-up current vs v2 (compx held at 0v) v2 (v) 1 0 pull-up current ( a) 2 6 8 10 20 14 2 3 3.5 2902 g21 4 16 18 12 1.5 2.5 4 4.5 5 t a = 25 c
8 ltc2902 2902f uu u pi fu ctio s rst (pin 6): reset logic output. active low with weak pull-up to v2 (ltc2902-1) or active pull-up to v2 (ltc2902-2). pulls low when any voltage input is below the reset threshold and held low for programmed delay time after all voltage inputs are above threshold. may be pulled above v2 using an external pull-up (ltc2902-1 only). t0 (pin 7): digital input for supply tolerance selection (5%, 7.5%, 10% or 12.5%). used in conjunction with t1 (pin 9). see applications information for tolerance selec- tion chart (table 4). rdis (pin 8): digital input for rst disable. a low input on this pin forces the rst output to v2 (or pull-up voltage). useful for determining supply margins without issuing reset command to processor. a weak internal pull-up allows pin to be left floating for normal monitor operation. t1 (pin 9): digital input for supply tolerance selection (5%, 7.5%, 10% or 12.5%). used in conjunction with t0 (pin 7). see applications information for tolerance selec- tion chart (table 4). gnd (pin 10): ground. v pg (pin 11): voltage threshold combination select input. connect to an external 1% resistive divider be- tween v ref and gnd to select 1 of 16 combinations of preset and/or adjustable voltage thresholds (see table 1). do not add capacitance on the v pg pin. v ref (pin 12): buffered reference voltage. a 1.210v nominal reference used for programming voltage (v pg ) and for the offset of negative adjustable applications. the buffered reference can source and sink up to 1ma. the reference can drive a bypass capacitor of up to 1000pf without oscillation. v4 (pin 13): voltage input 4. select from 1.8v, 1.5v, adj or C adj. see table 1 for details. v2 (pin 14): voltage input 2. select from 3.3v, 3v or 2.5v. see table 1 for details. the greater of (v1, v2) is also v cc for chip. bypass this pin to ground with a 0.1 m f (or greater) capacitor. all logic outputs (comp1, comp2, comp3, comp4) are weakly pulled up to v2. rst is weakly pulled up to v2 in the ltc2902-1 and rst is actively pulled up to v2 in the ltc2902-2. comp4 (pin 15): comparator output 4. nondelayed, active high logic output with weak pull-up to v2. pulls high when v4 is above reset threshold. may be pulled greater than v2 using external pull-up. comp2 (pin 16): comparator output 2. nondelayed, active high logic output with weak pull-up to v2. pulls high when v2 is above reset threshold. may be pulled greater than v2 using external pull-up.
9 ltc2902 2902f + + + + 4 14 3 13 v1 v2 v3 resistive divider matrix v4 10 gnd a/d buffer 11 v pg 12 v ref 5 crt c rt bandgap reference adjustable reset pulse generator buffer gain adjust power detect v1 v2 v cc 6 rst v2 22 a v cc 8 rdis 2 a 10 a 15 comp4 v2 6 a 6 a v cc ltc2902-1 1 comp3 v2 6 a 16 comp2 v2 6 a 2 comp1 v2 6 a 9 t1 7 t0 2902 db-1 6 rst v2 ltc2902-2 block diagra w
10 ltc2902 2902f applicatio s i for atio wu uu power-up on power-up, the larger of v1 or v2 will power the drive circuits for the rst and the compx pins. this ensures that the rst and compx outputs will be low as soon as v1 or v2 reaches 1v. the rst and compx outputs will remain low until the part is programmed. after program- ming, if any one of the v x inputs is below its programmed threshold, rst will be a logic low. once all the v x inputs rise above their thresholds, an internal timer is started and rst is released after the programmed delay time. if v cc < (v3 C 1) and v cc < 2.4v, the v3 input impedance will be low (1k w typ). monitor programming the ltc2902 input voltage combination is selected by placing the recommended resistor divider from v ref to gnd and connecting the tap point to v pg , as shown in figure 4. table 1 offers recommended 1% resistor values for the various modes. the last column in table 1 speci- fies optimum v pg /v ref ratios ( 0.01) to be used when pro gramming with a ratiometric dac. during power-up, once v1 or v2 reaches 2.4v (max), the monitor enters a programming period of approximately 150 m s during which the voltage on the v pg pin is sampled and the monitor is configured to the desired input combi- nation. do not add capacitance to the v pg pin. immediately after programming, the comparators are enabled and supply monitoring will begin. supply monitoring the ltc2902 is a low power, high accuracy program- mable quad supply monitoring circuit with four nondelayed monitor outputs, a common reset output and selectable supply thresholds. reset timing is adjustable using an external capacitor. single pin programming selects 1 of 16 input voltage monitor combinations. two digital inputs select one of four supply tolerances (5%, 7.5%, 10% or 12.5%). all four voltage inputs must be above predeter- mined thresholds for the reset not to be invoked. the ltc2902 will assert the reset and comparator outputs during power-up, power-down and brownout conditions on any one of the voltage inputs. table 1. voltage threshold programming v pg mode v1 (v) v2 (v) v3 (v) v4 (v) r1 (k w ) r2 (k w )v ref 0 5.0 3.3 adj adj open short 0.000 1 5.0 3.3 adj Cadj 93.1 9.53 0.094 2 3.3 2.5 adj adj 86.6 16.2 0.156 3 3.3 2.5 adj Cadj 78.7 22.1 0.219 4 3.3 2.5 1.5 adj 71.5 28.0 0.281 5 5.0 3.3 2.5 adj 66.5 34.8 0.344 6 5.0 3.3 2.5 1.8 59.0 40.2 0.406 7 5.0 3.3 2.5 1.5 53.6 47.5 0.469 8 5.0 3.0 2.5 adj 47.5 53.6 0.531 9 5.0 3.0 adj adj 40.2 59.0 0.594 10 3.3 2.5 1.8 1.5 34.8 66.5 0.656 11 3.3 2.5 1.8 adj 28.0 71.5 0.719 12 3.3 2.5 1.8 Cadj 22.1 78.7 0.781 13 5.0 3.3 1.8 Cadj 16.2 86.6 0.844 14 5.0 3.3 1.8 adj 9.53 93.1 0.906 15 5.0 3.0 1.8 adj short open 1.000 figure 4. monitor programming 12 11 10 r1 1% r2 1% 2902 f04 v ref v pg gnd ltc2902 the inverting inputs on the v3 and/or v4 comparators are set to 0.5v when the positive adjustable modes are selected and with t0 and t1 low (5% tolerance) (figure 5). the tap point on an external resistive divider, connected between the positive voltage being sensed and ground, is connected to the high impedance noninverting inputs (v3, v4). the trip voltage is calculated from: vv r r trip =+ ? ? ? ? 05 1 3 4 . once the resistor divider is set in the 5% tolerance mode, there is no need to change the divider for the other tolerance modes (7.5%, 10%, 12.5%) because the inter- nal reference is scaled accordingly, moving the trip point in C 2.5% increments.
11 ltc2902 2902f applicatio s i for atio wu uu in the negative adjustable mode, the noninverting input on the v4 comparator is connected to ground (figure 6). the tap point on an external resistive divider, connected be- tween the negative voltage being sensed and the v ref pin, is connected to the high impedance inverting input (v4). v ref provides the necessary level shift required to operate at ground. the trip voltage is calculated from: vv r r vv trip ref ref = ? ? ? ? = ;. 3 4 1 210 t0,t1 low (5% tolerance mode) once the resistor divider is set in the 5% tolerance mode, there is no need to change the divider for the other tolerance modes (7.5%, 10%, 12.5%) because v ref is scaled accordingly, moving the trip point in C 2.5% increments. in a negative adjustable application, the minimum value for r4 is limited by the sourcing capability of v ref ( 1ma). with no other load on v ref , r4 (minimum) is: 1.21v ? 1ma = 1.21k w tables 2 and 3 offer suggested 1% resistor values for various adjustable applications. although all four supply monitor comparators have built-in glitch immunity, bypass capacitors on v1 and v2 are recommended because the greater of v1 or v2 is also the v cc for the chip. filter capacitors on the v3 and v4 inputs are allowed. power-down on power-down, once any of the v x inputs drop below their threshold, rst and compx are held at a logic low. a logic low of 0.4v is guaranteed until both v1 and v2 drop below 1v. if the bandgap reference becomes invalid (v cc < 2v typ), the part will reprogram once v cc rises above 2.4v (max). monitor output rise and fall time estimation all of the outputs (rst, compx) have strong pull-down capability. if the external load capacitance (c load ) for a table 2. suggested 1% resistor values for the adj inputs v supply (v) v trip (v) r3 (k w ) r4 (k w ) 12 11.25 2150 100 10 9.4 1780 100 8 7.5 1400 100 7.5 7 1300 100 6 5.6 1020 100 5 4.725 845 100 3.3 3.055 511 100 3 2.82 464 100 2.5 2.325 365 100 1.8 1.685 237 100 1.5 1.410 182 100 1.2 1.120 124 100 1 0.933 86.6 100 0.9 0.840 68.1 100 table 3. suggested 1% resistor values for the Cadj input v supply (v) v trip (v) r3 (k w ) r4 (k w ) C2 C1.87 187 121 C5 C4.64 464 121 C5.2 C4.87 487 121 C10 C9.31 931 121 C12 C11.30 1130 121 figure 5. setting the positive adjustable trip point figure 6. setting the negative adjustable trip point + 2902 f06 v4 v ref 13 12 v trip r4 1% r3 1% ltc2902 + + 0.5v 5% tolerance mode 2902 f05 v3 or v4 v trip r3 1% r4 1% ltc2902
12 ltc2902 2902f applicatio s i for atio wu uu particular output is known, output fall time (10% to 90%) is estimated using: t fall ? 2.2 ? r pd ? c load where r pd is the on-resistance of the internal pull-down transistor. the typical performance curve (v ol vs i sink ) demonstrates that the pull-down current is somewhat linear versus output voltage. using the 25 c curve, r pd is estimated to be approximately 40 w . assuming a 150pf load capacitance, the fall time is about 13.2ns. although the outputs are considered to be open-drain, they do have a weak pull-up capability (see compx or rst pull-up current vs v2 curve). output rise time (10% to 90%) is estimated using: t rise ? 2.2 ? r pu ? c load where r pu is the on-resistance of the pull-up transistor. the on-resistance as a function of the v2 voltage at room temperature is estimated using: r v pu =w 610 21 5 with v2 = 3.3v, r pu is about 260k. using 150pf for load capacitance, the rise time is 86 m s. if the output needs to pull up faster and/or to a higher voltage, a smaller external pull-up resistor may be used. using a 10k pull- up resistor, the rise time is reduced to 3.3 m s for a 150pf load capacitance. the ltc2902-2 has an active pull-up to v2 on the rst output. the typical performance curve (rst pull-up cur- rent vs v2 curve) demonstrates that the pull-up current is somewhat linear versus the v2 voltage and r pu is esti- mated to be approximately 625 w . a 150pf load capaci- tance makes the rise time about 206ns. selecting the reset timing capacitor the reset time-out period is adjustable in order to accom- modate a variety of microprocessor applications. the reset time-out period, t rst , is adjusted by connecting a capacitor, c rt , between the crt pin and ground. the value of this capacitor is determined by: c rt = t rst ? 217 ? 10 C9 with c rt in farads and t rst in seconds. the c rt value per millisecond of delay can also be expressed as c rt /ms = 217 (pf/ms). leaving the crt pin unconnected will generate a mini- mum reset time-out of approximately 50 m s. maximum reset time-out is limited by the largest available low leakage capacitor. the accuracy of the time-out period will be affected by capacitor leakage (the nominal charging current is 2 m a) and capacitor tolerance. a low leakage ceramic capacitor is recommended. tolerance programming and the reset disable using the two digital inputs t0 and t1, the user can program the global supply tolerance for the ltc2902 (5%, 7.5%, 10%, 12.5%). the larger tolerances provide more headroom by lowering the trip thresholds. table 4. tolerance programming t0 t1 tolerance (%) v ref (v) low low 5 1.210 low high 7.5 1.178 high low 10 1.146 high high 12.5 1.113 under conventional operation, rst and compx will go low when v x is below its threshold. at any time, the rdis pin can be pulled low, overriding the reset operation and forcing the rst pin high. this feature is useful when determining supply margins under processor control since the reset command will not be invoked. the rdis pin is connected to a weak internal pull-up to v cc (10 m a typ), allowing the pin to be left floating if unused. ensuring rst valid for v cc down to 0v (ltc2902-2) when v cc is below 1v the rst pull-down capability is drastically reduced. the rst pin may float to undeter- mined voltages when connected to high impedance (such as cmos logic inputs). the addition of a pull-down resis- tor from rst to ground will provide a path for stray charge and/or leakage currents. the resistor value should be small enough to provide effective pull-down without ex- cessively loading the pull-up circuitry. too large a value may not pull down well enough. a 100k resistor from rst to ground is satisfactory for most applications.
13 ltc2902 2902f quad supply monitor, 5% tolerance 5v, 3v, 1.8v, 12v (adj) typical applicatio s u 5v, C5v monitor with unused v2, v3 inputs pulled above trip thresholds (5% tolerance) comp2 comp4 v2 v4 v ref v pg gnd t1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 comp3 comp1 v3 v1 crt rst t0 rdis r4 121k 1% r3 464k 1% system reset ?v 5v r2 86.6k 1% r1 16.2k 1% ltc2902 v trip = 4.64v 2902 ta03 c rt comp2 comp4 v2 v4 v ref v pg gnd t1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 comp3 comp1 v3 v1 crt rst t0 rdis r3 2.15m 1% system reset 1.8v 3v 12v 5v c rt r4 100k 1% ltc2902 v trip = 11.25v 2902 ta02
14 ltc2902 2902f typical applicatio s u quad supply monitor with led undervoltage indicators, 12.5% tolerance, reset disabled 5v, 3.3v, 2.5v, 1.5v comp2 comp4 v2 v4 v ref v pg gnd t1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 comp3 comp1 v3 v1 crt rst t0 rdis 1.5v 3.3v 5v 2.5v r2 47.5k 1% r1 53.6k 1% r l2 1k led ltc2902 2902 ta04 c rt r l4 1k led r l3 1k led r l1 1k led
15 ltc2902 2902f u package descriptio gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. gn16 (ssop) 0502 12 3 4 5 6 7 8 .229 ?.244 (5.817 ?6.198) .150 ?.157** (3.810 ?3.988) 16 15 14 13 .189 ?.196* (4.801 ?4.978) 12 11 10 9 .016 ?.050 (0.406 ?1.270) .015 .004 (0.38 0.10) 45 0 ?8 typ .007 ?.0098 (0.178 ?0.249) .053 ?.068 (1.351 ?1.727) .008 ?.012 (0.203 ?0.305) .004 ?.0098 (0.102 ?0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ?.165 .0250 typ .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale
16 ltc2902 2902f part number description comments ltc690 5v supply monitor, watchdog timer and battery backup 4.65v threshold ltc694-3.3 3.3v supply monitor, watchdog timer and battery backup 2.9v threshold ltc699 5v supply monitor and watchdog timer 4.65v threshold ltc1232 5v supply monitor, watchdog timer and push-button reset 4.37v/4.62v threshold ltc1326 micropower precision triple supply monitor for 5v, 3.3v and adj 4.725v, 3.118v, 1v thresholds ( 0.75%) ltc1326-2.5 micropower precision triple supply monitor for 2.5v, 3.3v and adj 2.363v, 3.118v, 1v thresholds ( 0.75%) ltc1536 precision triple supply monitor for pci applications meets pci t fail timing specifications ltc1726-2.5 micropower triple supply monitor for 2.5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1726-5 micropower triple supply monitor for 5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1727-2.5/ltc1727-5 micropower triple supply monitor with open-drain reset individual monitor outputs in msop ltc1728-1.8/ltc1728-3.3 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1728-2.5/ltc1728-5 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1985-1.8 micropower triple supply monitor with push-pull reset output 5-lead sot-23 package ltc2900 programmable quad supply monitor adjustable reset, 10-lead msop package ltc2901 programmable quad supply monitor adjustable reset and watchdog timer, 16-lead ssop package lt/tp 1002 2k ? printed in usa ? linear technology corporation 2002 related parts typical applicatio u quad supply monitor with hysteresis 5% tolerance (supplies rising) 12.5% tolerance (after rst goes high) comp1 comp2 comp3 comp4 rst t0 t1 crt 4 14 3 13 8 12 11 10 2 16 1 15 6 7 9 5 v1 v2 v3 v4 rdis v ref v pg gnd 5v 3.3v 2.5v 1.8v c rt 10k r1 59k 1% r2 40.2k 1% ltc2902-1 2902 ta05 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com

▲Up To Search▲

Price & Availability of LTC2902-1IGN

	To Download LTC2902-1IGN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .